PEX 8533

PEX 8533  Lead Free 

PEX 8533: 32 Lane, 6 Port PCI Express Switch, 35 x 35mm² PBGA

The ExpressLane™ PEX 8533 device offers 32 PCI Express lanes, capable of configuring up to 6 flexible ports. The switch conforms to the PCI Express Base Specification, rev 1.1. The 32-lane switch enables users to add scalable, high bandwidth I/Os to a wide variety of applications including servers, storage, communications, blade servers, and embedded-control systems. The PEX 8533 is well suited for fan-out, aggregation, peer-to-peer, backplane, and switch fabric applications. The architecture supports packet cut-thru with the industry's lowest latency of 115ns (x8 to x8) for a 32-lane switch. This, combined with large packet memory (1024 byte maximum payload size) and non-blocking internal switch architecture, provide full line-rate on all ports for performance-hungry applications. The PEX 8533 is offered in a 35 x 35mm² 680-ball PBGA package. This device is available in leaded and lead-free packaging.

Page Index

Related Gen 3 Devices


Related Gen 2 Devices


Related Gen 1 Devices

PEX 8533 Technical Documentation

Document/Resources Everyone Access Requires Membership Requires NDA Description Version Date
Product Brief Download     Product Overview 1.5 05/08
Data Book     Download Detailed Technical Specifications 1.6 01/08
Design Notes     Download I2C Level Shifting and Voltage Management 1.0 08/07
    Download Quick Start Hardware Design Guide 1.0 09/07
Interoperability     Download Interoperability Report 1.0 02/07
Videos   View HTML   IO Sharing via PLX PCIe Switches -- Oct 2010
  View HTML   PCI Express 3.0 over Optical Cable -- Oct 2010
  View HTML   PCI Express Clustering for next generation data centers -- Oct 2010
Product Change Notification (PCN)     Download PCN-2007-14: ASE Assembly -- 09/07
    Download PCN-2008-2: Final Test ASE Kaohsiung -- 02/08
Ordering Information View HTML     Part Number, Listing and Compliance -- --
Quality & Reliability     Download ICP Test Report -- 27Sep10
  Download   Lead-Free Reflow Profile & Peak Temperature -- --
    Download Reliability Qualification Report -- --
Webinars   View HTML   About PLX PCIe Gen3 Switches (may require Webex plug-in) -- 05Oct11

PEX 8533 Development Tools

Document/Resources Everyone Access Requires Membership Requires NDA Description Version Date
Errata     Download Silicon Revisions and Errata List 1.7 03/10
Rapid Development Kit (RDK)     Download RDK Hardware Reference Manual 1.0 01/07
    Download RDK Product Overview 1.1 09/07
Software Development Kit (SDK)   View HTML   Software Development Kit -- --
BSDL     Download Boundary Scan Description Language files 1.1 01/08
HSPICE Model     Download PEX 8533 HSPICE Model 1.1 02/07
IBIS Models     Download IBIS Model 1.0 10/06
OrCAD     Download PEX 8533 RDK OrCAD Design files 1.0 07/07
GERBER     Download PEX 8533 RDK Gerber files 1.0 07/07
EEPROM     Download EEPROM Images 3.0 05/08
Design Guidelines     Download PCB Layout Review Guide 1.0 11Oct11

Relevant Press Releases

Release Date Announcement
08/01/11 PLX to Present on PCI Express-SSD Storage at Flash Memory Summit
11/08/10 PLX Announces Sampling of Industry's First PCI Express 3.0 Switches

PEX 8533 Applications

Application Description Document
Servers Rack-mount Server - Expands PCIe Ports & End Points ExpressApps#13
(PDF)
Blade
Stand-alone
Communications Router / Switch High-end Routers - High Throughput & Terabit Performance (High-end Routers) ExpressApps#10
(PDF)
PC Peripheral & Consumer Electronics Graphics / Video Dual & High Resolution Graphics - High packet throughput for Dual and High Resolution Graphics ExpressApps#3
(PDF)