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PEX 8609

8 Lane, 8 Port PCI Express Switch, 15 x 15mm PBGA
The ExpressLane™ PEX 8609 offers 8 PCI Express Gen 2 (5.0 GT/s) lanes, capable of configuring up to 8 flexible ports and fully conforms to the PCI Express Base Specification, rev 2.0. PEX 8609 architecture supports a high-performance DMA engine with four DMA channels and internal buffer space for internal descriptor support. Up to 256 descriptors are supported internally or alternatively descriptors can also exist in host memory. Each descriptor provides support for large transfer sizes (up to 128MB) giving the user the capability to perform very large data transfers in any direction (memory to device, device to device, memory to memory). PEX 8609 also supports cut-thru with the industry's lowest latency of 140ns (x4 to x1) and offers two virtual channels for traffic prioritization in the system. The device also features an on-chip Non-Transparent port for dual-host and failover applications and supports dual-clock domain operation by virtue of support for Spread Spectrum Clock (SSC) isolation, is offered in a 15 x 15mm 324-ball PBGA and is available in both leaded and lead-free packaging. This device supports Access Control Services (ACS).
Page Index
Related Gen 3 Devices
Related Gen 2 Devices
Related Gen 1 Devices
Supporting Documentation
- PCIe Technical Info & White Papers
- Company Overview, Product Snapshots
- Support Documentation (Quality, FAQs, RoHS...)
Hot Applications
PEX 8609 Technical Documentation
| Document/Resources | Everyone Access | Requires Membership | Requires NDA | Description | Version | Date |
|---|---|---|---|---|---|---|
| Product Brief | Download | Product Overview | 1.4 | 04/10 | ||
| Data Book | Download | Detailed Technical Specifications | 1.3 | 31Mar11 | ||
| Design Notes | Download | Dual Cast, 8600 family feature (white paper) | 1.0 | 10/07 | ||
| Download | Dynamic Buffer Pool, 8600 family feature (white paper) | 1.0 | 10/07 | |||
| Download | Error Injection (white paper) | 1.0 | 07/10 | |||
| Download | Implementing Multicast Using DMA in a PCIe Switch (white paper) | 1.0 | 01/09 | |||
| Download | Non-Transparent Mode: Setup & Demonstration (white paper) | 1.0 | 04/09 | |||
| Download | PEX8609 Hardware Design Checklist | 1.0 | 11/09 | |||
| Download | Power Management Modes, PEX 8600 Products (white paper) | 1.0 | 04/08 | |||
| Download | Quick Start Hardware Design Guide | 1.2 | 12/09 | |||
| Download | Read Pacing, 8600 family feature (white paper) | 1.0 | 10/07 | |||
| Download | REXT Resistor Guidelines | 1.1 | 05Aug11 | |||
| Errata | Download | Silicon Errata List | 1.7 | 09July11 | ||
| Interoperability | Download | Interoperability Report | 2.0 | 06/09 | ||
| Application Notes | Download | Gen 2 switch compatibility with Gen 1 devices | 1.2 | 11/09 | ||
| Download | Performance Metrics White Paper | 1.0 | 07Oct10 | |||
| Download | Performance Monitor Feature (white paper) | 1.0 | 05Jan11 | |||
| Download | Timing Specifications for EEPROM, I2C, and JTAG | 1.1 | 24Aug10 | |||
| Download | Using a PCIe Switch as a Bandwidth Bridge | 1.0 | 04/10 | |||
| Download | Using Dual Cast feature of Gen 2 switches | 1.0 | 05/08 | |||
| Videos | View HTML | IO Sharing via PLX PCIe Switches | -- | Oct 2010 | ||
| View HTML | PCI Express 3.0 over Optical Cable | -- | Oct 2010 | |||
| View HTML | PCI Express Clustering for next generation data centers | -- | Oct 2010 | |||
| Product Change Notification (PCN) | Download | PCN-2010-14: Final Test Location (ASE Kaohsiung Taiwan) | 1.0 | 26Oct10 | ||
| Download | PDN-2011-4: Product Discontinuance Notice of select revisions/packages | -- | 22Dec11 | |||
| Ordering Information | View HTML | Part Number, Listing and Compliance | -- | -- | ||
| Quality & Reliability | Download | Certificate of Compliance (CoC) -- REACH | -- | 28Jan11 | ||
| Download | Green 15x15 PBGA Materials Analysis Data Report | -- | 04/09 | |||
| Download | ICP Test Report | -- | 27Sep10 | |||
| Download | ICP Test Reports | -- | -- | |||
| Download | Material Analysis Data, Green (35x35mm) | -- | 15Feb11 | |||
| Download | Materials Analysis Data | -- | 04/09 | |||
| Download | Moisture/Reflow Sensitivity Classification (IPC/JEDEC J-STD-020D.1) | -- | 03/08 | |||
| Download | Reliability Qualification Report | -- | 06/09 | |||
| Download | RoHS 6/6 Certificate of Compliance (PEX86xx Flip Chip BGA products with a suffix 'F') | -- | -- | |||
| Webinars | View HTML | About PLX PCIe Gen3 Switches (may require Webex plug-in) | -- | 05Oct11 |
PEX 8609 Development Tools
| Document/Resources | Everyone Access | Requires Membership | Requires NDA | Description | Version | Date |
|---|---|---|---|---|---|---|
| Signal Integrity Kit | Download | PCIe Receiver Equalization (white paper) | 1.0 | 12/08 | ||
| Download | PLX Gen 2 Testing over "16 / 30" Tyco Comm Backplane (presentation) | 1.0 | 12/08 | |||
| Download | PLX PCI Express over 30" of Legacy Backplane (white paper) | 1.0 | 07/08 | |||
| Download | Tool provides loss estimation and bandwidth distortion for a specified trace distance and configuration. | 2.0 | 06/08 | |||
| Download | Using PEX 8648 SMA based (SI) Card (white paper) | 1.3 | 20Jul10 | |||
| Rapid Development Kit (RDK) | Download | Hardware Reference Manual | 1.1 | 11/09 | ||
| Download | OrCAD Design Files for RDK | -- | 03Mar11 | |||
| Software Development Kit (SDK) | View HTML | Software Development Kit | -- | -- | ||
| BSDL | Download | Boundary Scan Description Language files | -- | 03/09 | ||
| HSPICE Model | Download | HSPICE Model | -- | 04/09 | ||
| Pinout Document | Download | Pinout List | 1.1 | 01/10 | ||
| Design Guidelines | Download | PCB Layout Review Guide | 1.0 | 11Oct11 |
Relevant Press Releases
PEX 8609 Applications
| Application | Description | Document | |
|---|---|---|---|
| Backplane Application in Embedded Systems | High Lane/Port Count Fan-Out | ExpressApps #74 (PDF) |
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